The original VITO tool is a preprocessor that converts behavioral Verilog into a form that can be synthesized by (IEEE 1364.1 compliant) commercial tools. VITO allows a designer to express an algorithm with software-like statements, such as while , and have them converted automatically into hardware. The key feature of VITO tools is they use the one-hot method for state machines .
Newer members of the VITO family include tools to convert VITO-compatible source Verilog into other high-level languages (BasicStamp, C, C++ and CUDA) for cycle-based simulation. The BasicStamp and C versions are useful when one wishes to design embedded-system software using Verilog; the CUDA version offers the potential to accelerate simulation on multi-core GPUs.
Also, VITO has been exteneded to act as a synthesis tool targeting a special kind of programmable logic, known as a Field Programmable One-Hot Array (FPOHA). Unlike the more common Field Programmable Gate Array (FPGA), such as the Xilinx Virtex family, which can be programmed using the original VITO together with a commercial synthesis tool, the FPOHA is specifically optimized for one-hot designs.
A comparison of the features and restrictions of the VITO tools is here.
This site is maintained by Mark Gordon Arnold, co-designer of the original VITO, and author of Verilog Digital Computer Design: Algorithms into Hardware, (1999, Prentice Hall PTR). Thanks to all who helped use and improve VITO, including: T. Bailey, E. Chester, J. H. Cho, J. Cowles, J. Cupal, F. Engineer, S. Langhanoja, D. Luksenberg, N. Sample, J. Shuler (original VITO's other co-designer), P. Vouzis and M. Winkel.
ARM, Parallax, BasicStamp, CUDA, Nvidia, Synopsys, Design Compiler, Xilinx, Virtex and Verilog are trademarks of their respective owners.
Updated Jan. 12, 2013.