VITO is a preprocessor that converts implicit style behavioral Verilog into other Verilog that describes a one-hot design. To the best of our knowledge, the output of VITO can then be synthesized into hardware using any of several commercially available Verilog synthesis tools. VITOCUDA is a modified version of this tool which produces CUDA code to allow a VITO-compliant Verilog source to be simulated using a GPU, possibly offering considerable speedup over conventional Verilog simulation. Because VITOCUDA and VITO use modified versions of the same file names, they must be installed in separate directories.
The implicit style input to VITO/VITOCUDA may contain multiple @(posedge sysclk) statements, each corresponding to a state in the machine. The implicit style Verilog may also contain arbitrarily nested control statements (such as if and while .) The resulting CUDA output from VITOCUDA describes a one-hot controller of the kind produced by VITO.
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This software is provided AS IS without warranty of any kind, including without limitation the warranties that the software is non-infringing, merchantable, or fit for a particular purpose, including high risk activities. The entire risk as to the quality and performance of the software is born by you. Should the software prove defective in any respect, you and not the developers, nor any parties associated with the developers, assume the entire cost of any service and repair.
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To use VITOCUDA:
Last updated on 10 Jan 2013